20172018
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Research Output 2017 2018

  • 2 Article
  • 1 Conference article in proceeding
2018

A Compositional Approach for Verifying Protocols Running on On-Chip Networks

Verbeek, F., Yaghini, P. M., Eghbal, A. & Bagherzadeh, N., Jul 2018, In : Ieee Transactions on Computers. 67, 7, p. 905-919 15 p.

Research output: Contribution to journalArticleAcademicpeer-review

2017

Deadlock Verification of Cache Coherence Protocols and Communication Fabrics

Verbeek, F., Yaghini, P. M., Eghbal, A. & Bagherzadeh, N., Feb 2017, In : Ieee Transactions on Computers. 66, 2, p. 272-284 13 p.

Research output: Contribution to journalArticleAcademicpeer-review

Estimating worst-case latency of on-chip interconnects with formal simulation

Verbeek, F. & van Vugt - Hage, N., 2017, Proceedings of the 17th Conference on Formal Methods in Computer-Aided Design (FMCAD 2017): TU Wien, Vienna, Austria, October 2-6, 2017. Stewart, D. & Weissenbacher, G. (eds.). IEEE, p. 204-211 8 p.

Research output: Chapter in Book/Report/Conference proceedingConference article in proceedingAcademicpeer-review