A Compositional Approach for Verifying Protocols Running on On-Chip Networks

Freek Verbeek*, Pooria M. Yaghini, Ashkan Eghbal, Nader Bagherzadeh

*Corresponding author for this work

Research output: Contribution to journalArticleAcademicpeer-review

Original languageEnglish
Pages (from-to)905-919
Number of pages15
JournalIeee Transactions on Computers
Volume67
Issue number7
DOIs
Publication statusPublished - Jul 2018

Keywords

  • Multiprocessor interconnection networks
  • Formal Verification
  • Routing protocols
  • MODEL CHECKING
  • COHERENCE PROTOCOLS
  • WORMHOLE NETWORKS
  • VERIFICATION
  • ABSTRACTION

Cite this

Verbeek, Freek ; Yaghini, Pooria M. ; Eghbal, Ashkan ; Bagherzadeh, Nader. / A Compositional Approach for Verifying Protocols Running on On-Chip Networks. In: Ieee Transactions on Computers. 2018 ; Vol. 67, No. 7. pp. 905-919.
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author = "Freek Verbeek and Yaghini, {Pooria M.} and Ashkan Eghbal and Nader Bagherzadeh",
year = "2018",
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doi = "10.1109/TC.2017.2786723",
language = "English",
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journal = "Ieee Transactions on Computers",
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publisher = "IEEE COMPUTER SOC",
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A Compositional Approach for Verifying Protocols Running on On-Chip Networks. / Verbeek, Freek; Yaghini, Pooria M.; Eghbal, Ashkan; Bagherzadeh, Nader.

In: Ieee Transactions on Computers, Vol. 67, No. 7, 07.2018, p. 905-919.

Research output: Contribution to journalArticleAcademicpeer-review

TY - JOUR

T1 - A Compositional Approach for Verifying Protocols Running on On-Chip Networks

AU - Verbeek, Freek

AU - Yaghini, Pooria M.

AU - Eghbal, Ashkan

AU - Bagherzadeh, Nader

PY - 2018/7

Y1 - 2018/7

KW - Multiprocessor interconnection networks

KW - Formal Verification

KW - Routing protocols

KW - MODEL CHECKING

KW - COHERENCE PROTOCOLS

KW - WORMHOLE NETWORKS

KW - VERIFICATION

KW - ABSTRACTION

U2 - 10.1109/TC.2017.2786723

DO - 10.1109/TC.2017.2786723

M3 - Article

VL - 67

SP - 905

EP - 919

JO - Ieee Transactions on Computers

JF - Ieee Transactions on Computers

SN - 0018-9340

IS - 7

ER -