Efficient pattern mapping for deterministic logic BIST

V. Gherman, H.-J. Wunderlich, H. Vranken, F. Hapke, M. Wittke, M. Garbers

Research output: Chapter in Book/Report/Conference proceedingConference Article in proceedingAcademicpeer-review


Deterministic logic BIST (DLBIST) is an attractive test strategy, since it combines advantages of deterministic external testing and pseudo-random LBIST. Unfortunately, previously published DLBIST methods are unsuited for large ICs, since computing time and memory consumption of the DLBIST synthesis algorithms increase exponentially, or at least cubically, with the circuit size. In this paper, we propose a novel DLBIST synthesis procedure that has nearly linear complexity in terms of both computing time and memory consumption. The new algorithms are based on binary decision diagrams (BDDs). We demonstrate the efficiency of the new algorithms for industrial designs up to 2M gates.
Original languageEnglish
Title of host publicationProceedings - International Test Conference
Publication statusPublished - 2004
Externally publishedYes


Dive into the research topics of 'Efficient pattern mapping for deterministic logic BIST'. Together they form a unique fingerprint.

Cite this