IC design validation using message sequence charts

H. Vranken, T.G. Garciá, S. Mauw, L. Feijs

Research output: Chapter in Book/Report/Conference proceedingConference Article in proceedingAcademicpeer-review


The authors describe a design validation method based on simulation of behavioral models, in which Message Sequence Charts (MSC) are used to visualize the simulation results and to aid in debugging. Thereto, we have extended a Philips proprietary tool, called TSS (Tool for System Simulation), with the possibility to visualize simulation traces.
Original languageEnglish
Title of host publicationConference Proceedings of the EUROMICRO
Publication statusPublished - 2000
Externally publishedYes


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