IC design validation using message sequence charts

H. Vranken; T.G. Garciá; S. Mauw; L. Feijs

doi:10.1109/EURMIC.2000.874624

IC design validation using message sequence charts

H. Vranken, T.G. Garciá, S. Mauw, L. Feijs

Research output: Chapter in Book/Report/Conference proceeding › Conference Article in proceeding › Academic › peer-review

Abstract

The authors describe a design validation method based on simulation of behavioral models, in which Message Sequence Charts (MSC) are used to visualize the simulation results and to aid in debugging. Thereto, we have extended a Philips proprietary tool, called TSS (Tool for System Simulation), with the possibility to visualize simulation traces.

Original language	English
Title of host publication	Conference Proceedings of the EUROMICRO
Pages	122-127
Volume	1
DOIs	https://doi.org/10.1109/EURMIC.2000.874624
Publication status	Published - 2000
Externally published	Yes

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10.1109/EURMIC.2000.874624

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title = "IC design validation using message sequence charts",

abstract = "The authors describe a design validation method based on simulation of behavioral models, in which Message Sequence Charts (MSC) are used to visualize the simulation results and to aid in debugging. Thereto, we have extended a Philips proprietary tool, called TSS (Tool for System Simulation), with the possibility to visualize simulation traces.",

author = "H. Vranken and T.G. Garci{\'a} and S. Mauw and L. Feijs",

year = "2000",

doi = "10.1109/EURMIC.2000.874624",

language = "English",

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AU - Vranken, H.

AU - Garciá, T.G.

AU - Mauw, S.

AU - Feijs, L.

PY - 2000

Y1 - 2000

N2 - The authors describe a design validation method based on simulation of behavioral models, in which Message Sequence Charts (MSC) are used to visualize the simulation results and to aid in debugging. Thereto, we have extended a Philips proprietary tool, called TSS (Tool for System Simulation), with the possibility to visualize simulation traces.

AB - The authors describe a design validation method based on simulation of behavioral models, in which Message Sequence Charts (MSC) are used to visualize the simulation results and to aid in debugging. Thereto, we have extended a Philips proprietary tool, called TSS (Tool for System Simulation), with the possibility to visualize simulation traces.

U2 - 10.1109/EURMIC.2000.874624

DO - 10.1109/EURMIC.2000.874624

M3 - Conference Article in proceeding

SN - 0-7695-0780-8

VL - 1

SP - 122

EP - 127

BT - Conference Proceedings of the EUROMICRO

ER -

IC design validation using message sequence charts

Abstract

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